Tarbok Consulting LLC

Software Development & Support

About

Are you looking for assistance on a software development project?

Perhaps your company wants to improve Verilog code coverage metrics and needs help developing UVM predictors and scoreboards?

Founded in 2025 by Justin Goins, Tarbok Consulting provides a wide variety of services in the fields of software design and electronics. We contract with companies to provide development support (C, C++, and Verilog), verification of HDL code, and similiar tasks. If you're curious, continue reading to learn more of Justin's prior experience.

For more information or to receive a quote, click here to email Us.

Verilog Firmware UVM C C++ Embedded Design SPI AHB Bus BASH Microcontrollers Scripting Network Security System Verilog Software Development SPICE Simulation Linux Expertise

Experience

Network Architect - Consulting Role

Confidential Client

2025 - Present

Implementing new computer network architecture to achieve CMMC Level 2 compliance
Deployed single sign-on using FIPS validated smartcards and Kerberos AES encryption
Migrated legacy CNC equipment to utilize isolated VLANs and micro-segmentation
Centralized log management for easier auditing and cybersecurity monitoring
Created internal RSA and ECC certificate authorities to secure network communication via TLS and RADIUS
Deployed full-disk AES encryption for protection of CUI (confidential unclassified information)

Digital Verification Engineer

onsemi - Corvallis, Oregon

2022 - 2025

Verified pre-silicon Verilog RTL for application-specific integrated circuits
Developed bit-accurate "Golden" simulation models in C++ and Perl
Created UVM predictors and scoreboards to allow for standardization and better code coverage
Wrote Verilog code as required to interface between the DUT (device under test) and the product test bench
Mentored multiple interns and guided them to write clean, reliable code based on best practices
Deployed continuous integration pipeline using Jenkins and Git

Senior Instructor

OSU - School of EECS - Corvallis, Oregon

2018 - 2022

Taught and developed courses related to computer architecture, operating system internals, software design, hardware development, and system administration
Hardware topics included VLSI design, CPU pipelining, memory caching, and embedded design. Everything from the MOSFET level to the CPU level.
Utilized numerous programming languages including C++, C, x86 Assembly, BASH, Perl, and various scripting languages
Created lab assignments, wrote grading rubrics, and managed teaching assistants
Taught several thousand students during my time as an EECS Instructor

Graduate Research Assistant

Oregon State University - Corvallis, Oregon

2010 - 2018

Researched and developed new technologies for low power wireless communications
Authored and proofread peer-reviewed papers
Used Cadence Virtuoso to design and model analog mixed-signal circuits
Designed PCBs, sourced components, and soldered prototype boards using SMD components
Programmed custom communication protocols in C and Assembly language
Designed a Windows-based graphical user interface using the QT framework & C++ to display sensor network data
Used Cadence Virtuoso to design and model analog mixed-signal circuits

RF Design Engineer Intern

Garmin AT - Salem, Oregon

Summer 2009

Designed test circuitry for avionics (related to GPS and aircraft navagation)
Developed custom circuit solutions including schematics & PCB layout

Education

Doctor of Philosophy (PhD) in Electrical & Computer Engr

Oregon State University

2010 - 2018

Thesis: Development and Implementation of JetNet: A Decentralized Wireless Sensing Protocol
Areas of focus included Advanced Computer Networking, Low power RF communication, CMOS analog design, Digital communication channel coding, Analog simulation, and DSP/VLSI system design.
Published peer-reviewed research

Bachelor of Science in Electrical & Computer Engr

Oregon State University

2006 - 2010

Graduated Cum Laude from the Honors College